The present invention relates to phase-locked loop (PLL) circuits and, more particularly, to PLL circuits adapted to prevent voltage-controlled oscillators operable over a wide frequency range from locking at a frequency higher than desired.
PLL circuits have been conventionally used in, for example, tuners for televisions. These conventional PLL circuits have, however, suffered from a disadvantage in that the circuit is apt to be locked at a frequency which is a multiple of the desired output frequency, as will be detailed below.
It is therefore an object of the invention to overcome the above described shortcoming of the prior art by providing an improved PLL circuit capable of avoiding unintentional locking of the circuit at a frequency multiple of the destined frequency.
To this end, according to the invention, there is provided a PLL circuit in which the phase of the variable signal which is input to a phase detector in the PLL circuit is suitably made to lag behind the phase of the reference signal, at the time of operation of a program switch which determines a divisor number of a program divider, and a power source switch, whereby the circuit is prevented from being locked at the above stated multiple frequency. Alternatively, means may be provided at the output side of a low-pass filter in the PLL circuit for preventing the controlled oscillator of the circuit from oscillating at a frequency which is higher than a preselected frequency by an octave or a larger frequency range width.
The above and other objects, as well as advantageous features of the invention will become clear from the following description of the preferred embodiments of the invention taken in conjunction with the attached drawings in which: